# UVM_Gen
**Repository Path**: oschip/UVM_Gen
## Basic Information
- **Project Name**: UVM_Gen
- **Description**: An agile cross-platform GUI-based UVM code Generator
- **Primary Language**: Java
- **License**: Apache-2.0
- **Default Branch**: master
- **Homepage**: None
- **GVP Project**: No
## Statistics
- **Stars**: 6
- **Forks**: 0
- **Created**: 2026-01-08
- **Last Updated**: 2026-08-05
## Categories & Tags
**Categories**: Uncategorized
**Tags**: None
## README
Chinese | [English](README.md)
UVM_Gen is a feature-rich UVM verification environment generation tool, specially designed for digital verification engineers. It can quickly generate a complete verification environment framework and automatically generate simulation scripts, supporting online file editing, compilation, and simulation execution. It is cross-platform, requires no installation, provides a Linux binary package, and is ready to use out of the box. We will continue to enrich, improve, extend, and evolve this new tool in the future to significantly enhance verification efficiency and quality.
## Highlights
- Supports default display of partial component names
- Supports creating VIP and DPI-C
- Supports automatic creation of internal Agent components
- Supports multiple instantiations of Agent
- Supports connecting verification components and setting connection types
- Supports configuring properties of verification components
- Supports uploading register CSV files to generate register models
- Supports uploading RTL files to automatically parse top-level signals
- Supports compilation and execution of verification code
- Supports Linux platform
## Functional Features
### File Upload and Parsing
- Supports double-clicking DUT to upload a ZIP archive containing RTL files, automatically parsing top-level port information
- Supports clicking to upload register CSV files in the register_model component to automatically parse and generate register models
### Component Creation and Deletion
- Create Test-level components within TB
- Create Env and other components under Test level
- Create Agent, VIP, and other components within Env
- Create Driver, Monitor, and other components within Agent
- Create DPI-C in RefMod
- Support right-click delete for deletion
### Component Name and Property Configuration
- Support editing component names
- Support configuring UVM phase type (for certain components)
- Support configuring transaction (for certain components)
- Support configuring testname (test_lib)
- Support configuring report_level (base_test)
- Support configuring path (VIP)
- Support multiple instantiations (Agent)
- Support configuring IS_ACTIVE attribute (Agent)
- Support editing signal names and bit widths (interface)
### Component Connection
- Set TLM port type
- Set the transmitted transaction
- Set the instantiation name in Initiator
- Set the instantiation name in Target
### Code Editing
- Editable between user code start and user code end; other areas are not editable
- Support switching among multiple theme modes
### Save and Open Projects
- Support creating template projects
- Support saving existing projects
- Support opening historically saved projects
### Compilation and Execution
- Support setting UVM_LIB
- Support setting simulation engine
- Support setting test case
- Support setting custom compilation options
- Support setting SEED
## Quick Start
- You can directly download our binary executable from the links below for immediate experience, ready to use out of the box.
### Environment Requirements
- Python: This project requires Python to run; please ensure a Python environment is installed.
- Dependencies: The project depends on Mako, Markupsafe, and Yaml libraries. Please install them via: `pip install markupsafe mako pyyaml`
- Java: 1.8
### Linux Version Download Links
- https://gitee.com/oschip/UVM_Gen/releases/download/V1.0.0/UVM_part_00
- https://gitee.com/oschip/UVM_Gen/releases/download/V1.0.0/UVM_part_01
### Example: Quick Usage
1. **Open UVM_Gen Tool**
- Download the UVM_part_00 and UVM_part_01 files.
- Run `cat UVM_part_* > UVM_Gen-1.0.0.AppImage` to merge the two files into UVM_Gen-1.0.0.AppImage.
- In the terminal, navigate to the directory containing the file and grant execute permission: `chmod +x ./UVM_Gen-1.0.0.AppImage`
- Execute the following command to run the program: `./UVM_Gen-1.0.0.AppImage --no-sandbox`
1. **Create Verification Project**
- Click Create_Project, enter a project name, and create the project
1. **Generate and Edit Framework Code**
- Click the generate button to generate the verification framework code; double-click components to edit code within editable regions
1. Compile and Run
- Click compile, and input the corresponding content as prompted to compile the code
- Click run, and input the corresponding content as prompted to run the code
2. Detailed Documentation and Tutorials
- For complete tool usage guides, advanced feature tutorials, and FAQs, please visit our official Wiki documentation site: https://gitee.com/oschip/UVM_Gen/wikis
## Feedback & Contributions
We welcome any feedback and contributions! You can submit Issues and Pull Requests on our [Gitee repository](https://gitee.com/oschip/UVM_Gen).
You may also contact us via email: OSC mailto:HIP@126.com.
We look forward to and value your feedback—it is one of our key motivations for moving forward.